SCHEMATICS · LAYOUT · BRING-UP · PRODUCTION
PCB design for embedded and wireless products
ABTC designs printed circuit boards that are meant to be assembled, tested, programmed and supported—not merely routed. We combine schematic design, high-density layout, radio-frequency constraints, power integrity and firmware awareness to reduce the risk of board spins and difficult production failures.
Our work ranges from compact battery devices to connected industrial controllers and multiprotocol wireless products. We can own a complete hardware design, review an existing design before fabrication, adapt a prototype for industrialisation or work alongside your mechanical, firmware and compliance teams.
Hardware and firmware are designed together
A pin assignment is also a peripheral, interrupt and DMA decision. A regulator affects radio stability, analogue noise and sleep current. Debug access influences how quickly firmware can recover a prototype. We review those interactions before layout, when they are still cheap to change.
That system view is especially valuable for Nordic Semiconductor and Qorvo designs, where antenna placement, clocking, RF routing, power peaks, coexistence and firmware timing are tightly connected. ABTC's hardware and embedded software engineers collaborate on the same product baseline.
Dense layouts without losing manufacturability
We work with multilayer and HDI constructions, fine-pitch BGA and QFN devices, microvias, blind and buried structures, 0201 components, controlled-impedance routing and constrained RF keep-outs. Density is never treated as an excuse to ignore fabrication capability, inspection, rework or yield.
Stack-up, via strategy, copper balance, return paths, decoupling and thermal behaviour are considered as an interdependent design. The result is a board that fits the enclosure while remaining realistic for the selected manufacturer and volume.
PCB engineering capabilities
Architecture and schematics
Requirements review, component selection, power tree, interfaces, protection, clocks, reset, programming, debug and design-rule definition.
RF and wireless layout
BLE, Wi-Fi, UWB, GNSS and cellular layouts, antenna placement, matching provisions, controlled impedance, shielding and clean return-current paths.
High-density layout
Multilayer and HDI boards, BGA escape, microvias, fine-pitch components, rigid mechanical limits and disciplined placement/routing strategy.
Power and signal integrity
Power distribution, transient loads, decoupling, grounding, sensitive analogue domains, high-speed interfaces and practical EMI risk reduction.
DFM, DFA and testability
Fabrication and assembly constraints, panel considerations, test points, programming access, inspection, variant control and production-test planning.
Prototype bring-up
Assembly coordination, incoming inspection, rail and clock validation, programming, interface tests, fault isolation and documented design updates.
What you receive
Deliverables are agreed around the project and can include native schematic and PCB source files, reviewed libraries, fabrication drawings, Gerber or ODB++ data, drill files, pick-and-place data, assembly drawings, controlled BOMs, stack-up and impedance notes, programming/test requirements and a design decision record.
We also support prototype purchasing and production management with European manufacturing partners. Supplier coordination does not replace engineering ownership: deviations, substitutions and build feedback are reviewed against the design intent before they become undocumented production changes.
Designed for the next stage, not only the next demo
Early prototypes need visibility and flexibility; pilot units need repeatability and manufacturing realism. We make that distinction explicit. The right first board may include measurement points, alternate footprints and recovery options that disappear later. A board approaching production needs stronger control of sourcing, programming, calibration, test coverage and configuration.
If you already have a design, an independent review can focus on the expensive failure modes: power margins, RF compromises, incorrect footprints, return paths, thermal concentration, missing protection, test access and hardware assumptions that conflict with firmware. Finding one of those issues before release to manufacture usually pays for the review many times over.
DIRECT ACCESS TO OUR ENGINEERING LEAD
Schedule a meeting with Javier
Send us the functional requirements, mechanical limits and current design maturity. Choose a convenient time for an initial technical conversation with Javier Longares.